Abstract. The aim of this paper is to explore some features of the functional test generation problem, and on the basis of the gained experience, to propose a practical method for ...
Eduardas Bareisa, Vacius Jusas, Kestutis Motiejuna...
In order to reduce the time-to-market and simplify gatelevel test generation for digital integrated circuits, GAbased functional test generation techniques are proposed for behavi...
This paper develops an improved approach for hierarchical functional test generation for complex chips. In order to deal with the increasing complexity of functional test generati...