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    ISCA
    2006
    IEEE
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    Bulk Disambiguation of Speculative Threads in Multiprocessors
    14 years 5 months ago
    Bulk Disambiguation of Speculative Threads in Multiprocessors
    Download  iacoma.cs.uiuc.edu
    Transactional Memory (TM), Thread-Level Speculation (TLS), and Checkpointed multiprocessors are three popular architectural techniques based on the execution of multiple, cooperat...
    Luis Ceze, James Tuck, Josep Torrellas, Calin Casc...
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