DSD
2008
IEEE
14 years 3 months ago
2008
IEEE
While shrinking geometries of embedded LSI devices is beneficial for portable intelligent systems, it is increasingly susceptible to influences from electrical noise, process vari...
DSD
2008
IEEE
14 years 3 months ago
2008
IEEE
DSD
2008
IEEE
14 years 3 months ago
2008
IEEE
—Debugging and analyzing Wireless Sensor Networks (WSNs) are important tasks for improving the quality and performance of the network. In this paper, Pimoto is to be presented, w...
DSD
2008
IEEE
14 years 3 months ago
2008
IEEE
We propose a parallel and modular architecture well suited to 802.16e WiMax LDPC code decoding. The proposed design is fully compliant with all the code classes defined by the Wi...
DSD
2008
IEEE
14 years 3 months ago
2008
IEEE
Testability is one of the most important factors that are considered during design cycle along with reliability, speed, power consumption, cost and other factors important for a c...
DSD
2008
IEEE
14 years 3 months ago
2008
IEEE
This paper proposes a design method and programmable architectures for numerical function generators (NFGs) of two-variable functions. To realize a two-variable function in hardwa...
DSD
2008
IEEE
14 years 3 months ago
2008
IEEE
Ultra low power digital systems are key for any future wireless sensor nodes but also inside nomadic embedded systems (such as inside the digital front end of software defined rad...
DSD
2008
IEEE
14 years 3 months ago
2008
IEEE
Effective mapping of multimedia applications on massively parallel embedded systems is a challenging demand in the domain of compiler design. The software implementations of emerg...
DSD
2008
IEEE
14 years 3 months ago
2008
IEEE
This paper proposes a system-level cycle-based framework to model and design heterogeneous Multiprocessor Systems on-Chip (MPSoC), called GRAPES. The approach features flexibilit...
DSD
2008
IEEE
14 years 3 months ago
2008
IEEE
We propose a method to efficiently design a “parity generator”, which is a stand-alone block producing multiple parity bits of a given circuit. The parity generator is designe...