With each technology node shrink, a silicon chip becomes more susceptible to soft errors. The susceptibility further increases as the voltage is scaled down to save energy. Based ...
Error detection/correction techniques have been advocated for algorithmic self-assembly. Under rectilinear growth, it requires only two additional tiles, generally referred to as ...
Stephen Frechette, Yong-Bin Kim, Fabrizio Lombardi
The paper presents a new technique for designing a concurrently checking combinational circuit. The technique is based on partitioning the circuit into two independent sub-circuit...
Osnat Keren, Ilya Levin, Vladimir Ostrovsky, Beni ...
Nanoelectronic components are expected to suffer from very high error rates, implying the need for hardening techniques. We propose a fine-grained approach to harden a promising...
Scan-based debug methods give high observability of internal signals, however, they require halting the system to scan out responses from the circuit-under-debug (CUD). This is ti...
VLSI circuits in nanometer VLSI technology experience significant aging effects, which are embodied by performance degradation over operation time. Although this degradation can b...
Nimay Shah, Rupak Samanta, Ming Zhang, Jiang Hu, D...
Integrated circuits (IC) targeting at the streaming applications for tomorrow are becoming a fast growing market. Applications such as beamforming require mass computing capabilit...
It is widely recognized that device and interconnect fabrics at the nanoscale will be characterized by an increased susceptibility to transient faults. This appears to be intrinsi...
True random number generators (TRNGs) are extensively used in cryptography, simulations and statistics. Metastability is a way to generate true random numbers. By using electromag...