— Perturbation Projection Vector (PPV) is an established technique for oscillator phase noise analysis; However, the PPV method significantly loses accuracy when circuits have l...
As FPGA-based systems including soft-processors become increasingly common we are motivated to better understand the best way to scale the performance of such systems. In this pap...
Martin Labrecque, Peter Yiannacouras, J. Gregory S...
The map-reduce model requires users to express their problem in terms of a map function that processes single records in a stream, and a reduce function that merges all mapped out...
Jackson H. C. Yeung, C. C. Tsang, Kuen Hung Tsoi, ...
This work proposes a set of requirements for programming emerging FPGA-based high performance computing systems, and uses them to evaluate a number of existing parallel programmin...
We present an AES cipher implementation that is based on the BlockRAM and DSP units embedded within Xilinx’s Virtex-5 FPGAs. An iterative “basic” module outputs a 32 bit col...
This paper presents a proto-type autonomous signal processing system on a chip. The system is architected such that high performance digital signal processing occurs in the FPGA...
Currently, only Xilinx Field Programmable Gate Arrays (FPGAs) support Dynamic Partial Reconfiguration (DPR). While there is currently some Computer Aided Design (CAD) tool support...
Edward Chen, William A. Gruver, Dorian Sabaz, Lesl...
Power reduction is becoming more important as circuit size increases. This paper presents a tool called PowerCutter which employs accuracy-guaranteed word-length optimization to r...