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ICCAD
1996
IEEE
76views Hardware» more  ICCAD 1996»
14 years 27 days ago
Directional bias and non-uniformity in FPGA global routing architectures
This paper investigates the effect of the prefabricated routing track distribution on the area-efficiency of FPGAs. The first question we address is whether horizontal and vertica...
Vaughn Betz, Jonathan Rose
ICCAD
1996
IEEE
86views Hardware» more  ICCAD 1996»
14 years 27 days ago
Polarized observability don't cares
A new method is presented to compute the exact observability don't cares (ODC) for multilevel combinational circuits. A new mathematical concept, called polarization, is intr...
Harm Arts, Michel R. C. M. Berkelaar, C. A. J. van...
CAV
1997
Springer
95views Hardware» more  CAV 1997»
14 years 27 days ago
Model Checking and Transitive-Closure Logic
Neil Immerman, Moshe Y. Vardi
CAV
1997
Springer
202views Hardware» more  CAV 1997»
14 years 27 days ago
HYTECH: A Model Checker for Hybrid Systems
A hybrid system is a dynamical system whose behavior exhibits both discrete and continuous change. A hybrid automaton is a mathematical model for hybrid systems, which combines, i...
Thomas A. Henzinger, Pei-Hsin Ho, Howard Wong-Toi
CAV
1997
Springer
103views Hardware» more  CAV 1997»
14 years 27 days ago
Construction of Abstract State Graphs with PVS
Susanne Graf, Hassen Saïdi
CAV
1997
Springer
97views Hardware» more  CAV 1997»
14 years 27 days ago
Weak Bisimulation for Fully Probabilistic Processes
Christel Baier, Holger Hermanns
CAV
1997
Springer
111views Hardware» more  CAV 1997»
14 years 27 days ago
RuleBase: Model Checking at IBM
Ilan Beer, Shoham Ben-David, Cindy Eisner, Daniel ...
CAV
1997
Springer
114views Hardware» more  CAV 1997»
14 years 27 days ago
Partial-Order Reduction in Symbolic State Space Exploration
Rajeev Alur, Robert K. Brayton, Thomas A. Henzinge...
ECBS
1996
IEEE
155views Hardware» more  ECBS 1996»
14 years 28 days ago
Model-Integrated Program Synthesis Environment
In this paper, it is shown that, through the use of Model-Integrated Program Synthesis MIPS, parallel real-time implementations of image processing data ows can be synthesized fro...
Janos Sztipanovits, Gabor Karsai, Hubertus Franke