Sciweavers

ISPD
2003
ACM
117views Hardware» more  ISPD 2003»
14 years 2 months ago
Fishbone: a block-level placement and routing scheme
A block-level placement and routing scheme called Fishbone is presented. The routing uses a two-layer spine topology. The pin locations are configurable and restricted to certain ...
Fan Mo, Robert K. Brayton
ISPD
2003
ACM
132views Hardware» more  ISPD 2003»
14 years 2 months ago
Architecture and synthesis for multi-cycle communication
For multi-gigahertz designs in nanometer technologies, data transfers on global interconnects take multiple clock cycles. In this paper, we propose a regular distributed register ...
Jason Cong, Yiping Fan, Xun Yang, Zhiru Zhang
ISPD
2003
ACM
88views Hardware» more  ISPD 2003»
14 years 2 months ago
Porosity aware buffered steiner tree construction
— In order to achieve timing closure on increasingly complex IC designs, buffer insertion needs to be performed on thousands of nets within an integrated physical synthesis syste...
Charles J. Alpert, Gopal Gandham, Milos Hrkic, Jia...
ISPD
2003
ACM
105views Hardware» more  ISPD 2003»
14 years 2 months ago
Partition-driven standard cell thermal placement
The thermal problem has been emerged as one of the key issues for next-generation IC design. In this paper, we propose a scheme to achieve better thermal distribution for partitio...
Guoqiang Chen, Sachin S. Sapatnekar
ISPD
2003
ACM
121views Hardware» more  ISPD 2003»
14 years 2 months ago
Optimality, scalability and stability study of partitioning and placement algorithms
This paper studies the optimality, scalability and stability of stateof-the-art partitioning and placement algorithms. We present algorithms to construct two classes of benchmarks...
Jason Cong, Michail Romesis, Min Xie
ISPD
2003
ACM
92views Hardware» more  ISPD 2003»
14 years 2 months ago
Benchmarking for large-scale placement and beyond
Over the last five years the VLSI Placement community achieved great strides in the understanding of placement problems, developed new high-performance algorithms, and achieved i...
Saurabh N. Adya, Mehmet Can Yildiz, Igor L. Markov...
ISPD
2003
ACM
73views Hardware» more  ISPD 2003»
14 years 2 months ago
Research directions for coevolution of rules and routers
Design rules in advanced IC manufacturing processes are increasingly problematic for modern router architectures and algorithms. This paper first reviews types and causes of “d...
Andrew B. Kahng
SBACPAD
2003
IEEE
111views Hardware» more  SBACPAD 2003»
14 years 2 months ago
Boosting Performance for I/O-Intensive Workload by Preemptive Job Migrations in a Cluster System
Load balancing in a cluster system has been investigated extensively, mainly focusing on the effective usage of global CPU and memory resources. However, if a significant portion ...
Xiao Qin, Hong Jiang, Yifeng Zhu, David R. Swanson
SBACPAD
2003
IEEE
125views Hardware» more  SBACPAD 2003»
14 years 2 months ago
Applying Scheduling by Edge Reversal to Constraint Partitioning
— Scheduling by Edge Reversal (SER) is a fully distributed scheduling mechanism based on the manipulation of acyclic orientations of a graph. This work uses SER to perform constr...
Marluce Rodrigues Pereira, Patrícia Kayser ...
SBACPAD
2003
IEEE
103views Hardware» more  SBACPAD 2003»
14 years 2 months ago
Profiling and Optimization of Software-Based Network-Analysis Applications
A large set of tools for network monitoring and accounting, security, traffic analysis and prediction — more broadly, for network operation and management — require direct and...
Loris Degioanni, Mario Baldi, Fulvio Risso, Gianlu...