MICRO
2003
IEEE
14 years 2 months ago
2003
IEEE
Traditional software controlled data cache prefetching is often ineffective due to the lack of runtime cache miss and miss address information. To overcome this limitation, we imp...
MICRO
2003
IEEE
14 years 2 months ago
2003
IEEE
With faster CPU clocks and wider pipelines, all relevant microarchitecture components should scale accordingly. There have been many proposals for scaling the issue queue, registe...
MICRO
2003
IEEE
14 years 2 months ago
2003
IEEE
Energy-efficient processor design is becoming more and more important with technology scaling and with high performance requirements. Supply-voltage scaling is an efficient way to...
MICRO
2003
IEEE
14 years 2 months ago
2003
IEEE
Single-event upsets from particle strikes have become a key challenge in microprocessor design. Techniques to deal with these transient faults exist, but come at a cost. Designers...
MICRO
2003
IEEE
14 years 2 months ago
2003
IEEE
This paper proposes and evaluates single-ISA heterogeneous multi-core architectures as a mechanism to reduce processor power dissipation. Our design incorporates heterogeneous cor...
MICRO
2003
IEEE
14 years 2 months ago
2003
IEEE
Many dynamic optimization and/or binary translation systems hold optimized/translated superblocks in a code cache. Conventional code caching systems suffer from overheads when con...
MICRO
2003
IEEE
14 years 2 months ago
2003
IEEE
Ensuring back-to-back execution of dependent instructions in a conventional out-of-order processor requires scheduling logic that wakes up and selects instructions at the same rat...
MICRO
2003
IEEE
14 years 2 months ago
2003
IEEE
Abstract—High-speed routers often use commodity, fully-associative, TCAMs (Ternary Content Addressable Memories) to perform packet classification and routing (IP lookup). We prop...
MICRO
2003
IEEE
14 years 2 months ago
2003
IEEE
A dynamic optimizer is a runtime software system that groups a program’s instruction sequences into traces, optimizes those traces, stores the optimized traces in a softwarebase...
MICRO
2003
IEEE
14 years 2 months ago
2003
IEEE
The impact of pipeline length on both the power and performance of a microprocessor is explored both theoretically and by simulation. A theory is presented for a wide range of pow...