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MICRO
2003
IEEE
70views Hardware» more  MICRO 2003»
14 years 2 months ago
Fast Path-Based Neural Branch Prediction
Microarchitectural prediction based on neural learning has received increasing attention in recent years. However, neural prediction remains impractical because its superior accur...
Daniel A. Jiménez
MICRO
2003
IEEE
147views Hardware» more  MICRO 2003»
14 years 2 months ago
Flexible Compiler-Managed L0 Buffers for Clustered VLIW Processors
Wire delays are a major concern for current and forthcoming processors. One approach to attack this problem is to divide the processor into semi-independent units referred to as c...
Enric Gibert, F. Jesús Sánchez, Anto...
MICRO
2003
IEEE
125views Hardware» more  MICRO 2003»
14 years 2 months ago
Runtime Power Monitoring in High-End Processors: Methodology and Empirical Data
With power dissipation becoming an increasingly vexing problem across many classes of computer systems, measuring power dissipation of real, running systems has become crucial for...
Canturk Isci, Margaret Martonosi
MICRO
2003
IEEE
161views Hardware» more  MICRO 2003»
14 years 2 months ago
Design and Implementation of High-Performance Memory Systems for Future Packet Buffers
In this paper we address the design of a future high-speed router that supports line rates as high as OC-3072 (160 Gb/s), around one hundred ports and several service classes. Bui...
Jorge García-Vidal, Jesús Corbal, Ll...
MICRO
2003
IEEE
96views Hardware» more  MICRO 2003»
14 years 2 months ago
Using Interaction Costs for Microarchitectural Bottleneck Analysis
Attacking bottlenecks in modern processors is difficult because many microarchitectural events overlap with each other. This parallelism makes it difficult to both (a) assign a ...
Brian A. Fields, Rastislav Bodík, Mark D. H...
MICRO
2003
IEEE
166views Hardware» more  MICRO 2003»
14 years 2 months ago
Razor: A Low-Power Pipeline Based on Circuit-Level Timing Speculation
With increasing clock frequencies and silicon integration, power aware computing has become a critical concern in the design of embedded processors and systems-on-chip. One of the...
Dan Ernst, Nam Sung Kim, Shidhartha Das, Sanjay Pa...
MICRO
2003
IEEE
155views Hardware» more  MICRO 2003»
14 years 2 months ago
Comparing Program Phase Detection Techniques
Detecting program phase changes accurately is an important aspect of dynamically adaptable systems. Three dynamic program phase detection techniques are compared – using instruc...
Ashutosh S. Dhodapkar, James E. Smith
MICRO
2003
IEEE
109views Hardware» more  MICRO 2003»
14 years 2 months ago
TLC: Transmission Line Caches
It is widely accepted that the disproportionate scaling of transistor and conventional on-chip interconnect performance presents a major barrier to future high performance systems...
Bradford M. Beckmann, David A. Wood
MICRO
2003
IEEE
121views Hardware» more  MICRO 2003»
14 years 2 months ago
Exploiting Value Locality in Physical Register Files
The physical register file is an important component of a dynamically-scheduled processor. Increasing the amount of parallelism places increasing demands on the physical register...
Saisanthosh Balakrishnan, Gurindar S. Sohi
MICRO
2003
IEEE
88views Hardware» more  MICRO 2003»
14 years 2 months ago
Instruction Replication for Clustered Microarchitectures
Alex Aletà, Josep M. Codina, Antonio Gonz&a...