WMPI
2004
ACM
14 years 3 months ago
2004
ACM
The cache hierarchy design in existing SMT and superscalar processors is optimized for latency, but not for bandwidth. The size of the L1 data cache did not scale over the past dec...
WMPI
2004
ACM
14 years 3 months ago
2004
ACM
User-controllable coherence revives the idea of cooperation between software and hardware in an attempt to bridge the gap between efficient small-scale shared memory machines and m...
WMPI
2004
ACM
14 years 3 months ago
2004
ACM
Abstract. The large and growing impact of memory hierarchies on overall system performance compels designers to investigate innovative techniques to improve memory-system efficienc...
WMPI
2004
ACM
14 years 3 months ago
2004
ACM
Clustered microarchitectures are an effective organization to deal with the problem of wire delays and complexity by partitioning some of the processor resources. The organization ...
WMPI
2004
ACM
14 years 3 months ago
2004
ACM
The ever increasing gap in processor and memory speeds has a very negative impact on performance. One possible solution to overcome this problem is the Kilo-instruction processor. ...
WMPI
2004
ACM
14 years 3 months ago
2004
ACM
The Opie Project aims to develop a compiler to transform C codes written for row-major matrix representation into equivalent codes for Morton-order matrix representation, and to a...
WMPI
2004
ACM
14 years 3 months ago
2004
ACM
Current trends suggest that the number of memory chips per processor chip will increase at least a factor of ten in seven years. This will make DRAM cost, the space and the power i...
WMPI
2004
ACM
14 years 3 months ago
2004
ACM
This paper discusses die cost vs. performance tradeoffs for a PIM system that could serve as the memory system of a host processor. For an increase of less than twice the cost of ...
ISPD
2004
ACM
14 years 3 months ago
2004
ACM
ISPD
2004
ACM
14 years 3 months ago
2004
ACM
