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FPGA
2005
ACM
105views FPGA» more  FPGA 2005»
14 years 2 months ago
Soft error rate estimation and mitigation for SRAM-based FPGAs
FPGA-based designs are more susceptible to single-event upsets (SEUs) compared to ASIC designs. Soft error rate (SER) estimation is a crucial step in the design of soft error tole...
Ghazanfar Asadi, Mehdi Baradaran Tahoori
FPGA
2005
ACM
107views FPGA» more  FPGA 2005»
14 years 2 months ago
Instruction set extension with shadow registers for configurable processors
Configurable processors are becoming increasingly popular for modern embedded systems (especially for the field-programmable system-on-a-chip). While steady progress has been made...
Jason Cong, Yiping Fan, Guoling Han, Ashok Jaganna...
FPGA
2005
ACM
174views FPGA» more  FPGA 2005»
14 years 2 months ago
64-bit floating-point FPGA matrix multiplication
We introduce a 64-bit ANSI/IEEE Std 754-1985 floating point design of a hardware matrix multiplier optimized for FPGA implementations. A general block matrix multiplication algor...
Yong Dou, Stamatis Vassiliadis, Georgi Kuzmanov, G...
CHARME
2005
Springer
124views Hardware» more  CHARME 2005»
14 years 2 months ago
Finding and Fixing Faults
Stefan Staber, Barbara Jobstmann, Roderick Bloem
CHARME
2005
Springer
120views Hardware» more  CHARME 2005»
14 years 2 months ago
Minimizing Counterexample of ACTL Property
ShengYu Shen, Ying Qin, Sikun Li
CHARME
2005
Springer
136views Hardware» more  CHARME 2005»
14 years 2 months ago
Predictive Reachability Using a Sample-Based Approach
Abstract. Unbounded model checking of invariant properties is typically solved using symbolic reachability. However, BDD based reachability methods suffer from lack of robustness ...
Debashis Sahoo, Jawahar Jain, Subramanian K. Iyer,...
CHARME
2005
Springer
170views Hardware» more  CHARME 2005»
14 years 2 months ago
Counterexample Guided Invariant Discovery for Parameterized Cache Coherence Verification
Sudhindra Pandav, Konrad Slind, Ganesh Gopalakrish...
CHARME
2005
Springer
119views Hardware» more  CHARME 2005»
14 years 2 months ago
High-Level Modelling, Analysis, and Verification on FPGA-Based Hardware Design
Petr Matousek, Ales Smrcka, Tomás Vojnar
CHARME
2005
Springer
130views Hardware» more  CHARME 2005»
14 years 2 months ago
Improvements to the Implementation of Interpolant-Based Model Checking
The evolution of SAT technology over the last decade has motivated its application in model checking, initially through the utilization of SAT in bounded model checking (BMC) and, ...
João P. Marques Silva
CHARME
2005
Springer
124views Hardware» more  CHARME 2005»
14 years 2 months ago
A Parameterized Benchmark Suite of Hard Pipelined-Machine-Verification Problems
Panagiotis Manolios, Sudarshan K. Srinivasan