IEEEPACT
2005
IEEE
14 years 2 months ago
2005
IEEE
IEEEPACT
2005
IEEE
14 years 2 months ago
2005
IEEE
We propose a checkpoint store compression method for coarse-grain giga-scale checkpoint/restore. This mechanism can be useful for debugging, post-mortem analysis and error recover...
IEEEPACT
2005
IEEE
14 years 2 months ago
2005
IEEE
Transactional Coherence and Consistency (TCC) is a novel coherence scheme for shared memory multiprocessors that uses programmer-defined transactions as the fundamental unit of p...
IEEEPACT
2005
IEEE
14 years 2 months ago
2005
IEEE
Scratchpad memory (SPM), a fast software-managed onchip SRAM, is now widely used in modern embedded processors. Compared to hardware-managed cache, it is more efficient in perfor...
IEEEPACT
2005
IEEE
14 years 2 months ago
2005
IEEE
IEEEPACT
2005
IEEE
14 years 2 months ago
2005
IEEE
Hiding communication latency is an important optimization for parallel programs. Programmers or compilers achieve this by using non-blocking communication primitives and overlappi...
IEEEPACT
2005
IEEE
14 years 2 months ago
2005
IEEE
Global address space languages like UPC exhibit high performance and portability on a broad class of shared and distributed memory parallel architectures. The most scalable applic...
IEEEPACT
2005
IEEE
14 years 2 months ago
2005
IEEE
In this paper we compare the performance of area equivalent small, medium, and large-scale multithreaded chip multiprocessors (CMTs) using throughput-oriented applications. We use...
IEEEPACT
2005
IEEE
14 years 2 months ago
2005
IEEE
Current high-performance computer systems are unable to saturate the latest available high-bandwidth networks such as 10 Gigabit Ethernet. A key obstacle in achieving 10 gigabits ...
IEEEPACT
2005
IEEE
14 years 2 months ago
2005
IEEE
The continual demand for greater performance and growing concerns about the power consumption in highperformance microprocessors make the branch predictor a critical component of ...