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    ICCAD
    2009
    IEEE
    151views Hardware» more  ICCAD 2009»
    Timing yield-aware color reassignment and detailed placement perturbation for double patterning lithography
    13 years 9 months ago
    Timing yield-aware color reassignment and detailed placement perturbation for double patterning lithography
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    Double patterning lithography (DPL) is a likely resolution enhancement technique for IC production in 32nm and below technology nodes. However, DPL gives rise to two independent, ...
    Mohit Gupta, Kwangok Jeong, Andrew B. Kahng
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