Sciweavers

HPCA
2011
IEEE
13 years 3 months ago
ACCESS: Smart scheduling for asymmetric cache CMPs
In current Chip-multiprocessors (CMPs), a significant portion of the die is consumed by the last-level cache. Until recently, the balance of cache and core space has been primari...
Xiaowei Jiang, Asit K. Mishra, Li Zhao, Ravishanka...
HPCA
2011
IEEE
13 years 3 months ago
Exploiting criticality to reduce bottlenecks in distributed uniprocessors
Composable multicore systems merge multiple independent cores for running sequential single-threaded workloads. The performance scalability of these systems, however, is limited d...
Behnam Robatmili, Madhu Saravana Sibi Govindan, Do...
HPCA
2011
IEEE
13 years 3 months ago
Archipelago: A polymorphic cache design for enabling robust near-threshold operation
Extreme technology integration in the sub-micron regime comes with a rapid rise in heat dissipation and power density for modern processors. Dynamic voltage scaling is a widely us...
Amin Ansari, Shuguang Feng, Shantanu Gupta, Scott ...
HPCA
2011
IEEE
13 years 3 months ago
Shared last-level TLBs for chip multiprocessors
Translation Lookaside Buffers (TLBs) are critical to processor performance. Much past research has addressed uniprocessor TLBs, lowering access times and miss rates. However, as c...
Abhishek Bhattacharjee, Daniel Lustig, Margaret Ma...
HPCA
2011
IEEE
13 years 3 months ago
Mercury: A fast and energy-efficient multi-level cell based Phase Change Memory system
― Phase Change Memory (PCM) is one of the most promising technologies among emerging non-volatile memories. PCM stores data in crystalline and amorphous phases of the GST materia...
Madhura Joshi, Wangyuan Zhang, Tao Li
HPCA
2011
IEEE
13 years 3 months ago
Dynamic parallelization of JavaScript applications using an ultra-lightweight speculation mechanism
As the web becomes the platform of choice for execution of more complex applications, a growing portion of computation is handed off by developers to the client side to reduce net...
Mojtaba Mehrara, Po-Chun Hsu, Mehrzad Samadi, Scot...
HPCA
2011
IEEE
13 years 3 months ago
Relaxing non-volatility for fast and energy-efficient STT-RAM caches
Clinton Wills Smullen IV, Vidyabhushan Mohan, Anur...