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ICCAD
2002
IEEE
109views Hardware» more  ICCAD 2002»
14 years 8 months ago
Methods for true power minimization
This paper presents methods for efficient power minimization at circuit and micro-architectural levels. The potential energy savings are strongly related to the energy profile of ...
Robert W. Brodersen, Mark Horowitz, Dejan Markovic...
ICCAD
2002
IEEE
108views Hardware» more  ICCAD 2002»
14 years 8 months ago
SiSMA: a statistical simulator for mismatch analysis of MOS ICs
Giorgio Biagetti, Simone Orcioni, L. Signoracci, C...
ICCAD
2002
IEEE
227views Hardware» more  ICCAD 2002»
14 years 8 months ago
Generic ILP versus specialized 0-1 ILP: an update
Optimized solvers for the Boolean Satisfiability (SAT) problem have many applications in areas such as hardware and software verification, FPGA routing, planning, etc. Further use...
Fadi A. Aloul, Arathi Ramani, Igor L. Markov, Kare...
ICCAD
2002
IEEE
86views Hardware» more  ICCAD 2002»
14 years 8 months ago
Extraction and LVS for mixed-domain integrated MEMS layouts
Bikram Baidya, Tamal Mukherjee
ICCAD
2002
IEEE
100views Hardware» more  ICCAD 2002»
14 years 8 months ago
Multi-objective circuit partitioning for cutsize and path-based delay minimization
– In this paper we present multi-objective hMetis partitioning for simultaneous cutsize and circuit delay minimization. We change the partitioning process itself by introducing a...
Cristinel Ababei, Navaratnasothie Selvakkumaran, K...
ICCAD
2002
IEEE
142views Hardware» more  ICCAD 2002»
14 years 8 months ago
SAT and ATPG: Boolean engines for formal hardware verification
In this survey, we outline basic SAT- and ATPGprocedures as well as their applications in formal hardware verification. We attempt to give the reader a trace trough literature and...
Armin Biere, Wolfgang Kunz