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TVLSI
2002
130views more  TVLSI 2002»
13 years 6 months ago
Incremental compilation for parallel logic verification systems
Although simulation remains an important part of application-specific integrated circuit (ASIC) validation, hardware-assisted parallel verification is becoming a larger part of the...
R. Tessier, S. Jana
RSP
1999
IEEE
122views Control Systems» more  RSP 1999»
13 years 11 months ago
Incremental Compilation for Logic Emulation
Over the past decade, the steady growth rate of FPGA device capacities has enabled the development of multi-FPGA prototyping environments capable of implementing millions of logic...
Russell Tessier