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    DAC
    2003
    ACM
    138views Computer Architecture» more  DAC 2003»
    Instruction encoding synthesis for architecture exploration using hierarchical processor models
    15 years 5 months ago
    Instruction encoding synthesis for architecture exploration using hierarchical processor models
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    This paper presents a novel instruction encoding generation technique for use in architecture exploration for application specific processors. The underlying exploration methodolo...
    Achim Nohl, Volker Greive, Gunnar Braun, Andreas H...
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