Sciweavers

ISCAS
2005
IEEE
97views Hardware» more  ISCAS 2005»
14 years 5 months ago
Two-level decoupled Hamming network for associative memory under noisy environment
— Compared with a single level Hamming associative memory, a simple model based on uniform random noise analysis has proved a twolevel decoupled Hamming network to be an efficie...
Liang Chen, Naoyuki Tokuda, Akira Nagai
ISCAS
2005
IEEE
135views Hardware» more  ISCAS 2005»
14 years 5 months ago
Calculation of intermodulation distortion in CMOS transconductance stage
—The linearity of the transconductance stage is of major concern in the design of some analog circuits. In this paper, Volterra series expansion is used to compute the intermodul...
Lu Liu, Zhihua Wang, Guolin Li
ISCAS
2005
IEEE
162views Hardware» more  ISCAS 2005»
14 years 5 months ago
Capacitive coupling of data and power for 3D silicon-on-insulator VLSI
— We designed a 3D integrated multi-chip module that uses non-galvanic capacitive coupling to provide bi-directional communication and exchange power supply between two separate ...
Eugenio Culurciello, Andreas G. Andreou
ISCAS
2005
IEEE
171views Hardware» more  ISCAS 2005»
14 years 5 months ago
Image transmission over IEEE 802.15.4 and ZigBee networks
An image sensor network platform is developed for testing transmission of images over ZigBee networks that support multi-hopping. The ZigBee is a low rate and low power networking...
G. Pekhteryev, Zafer Sahinoglu, Philip V. Orlik, G...
ISCAS
2005
IEEE
141views Hardware» more  ISCAS 2005»
14 years 5 months ago
Convergence analysis of a background interstage gain calibration technique for pipelined ADCs
A mathematical framework for the convergence analysis of a pipelined ADC with background gain calibration is presented. The constraints on adaptation step size for mean convergenc...
Dong Wang, J. P. Keane, Paul J. Hurst, Bernard C. ...
ISCAS
2005
IEEE
123views Hardware» more  ISCAS 2005»
14 years 5 months ago
Sub-operation parallelism optimization in SIMD processor synthesis and its experimental evaluations
Abstract— In this paper, we propose a sub-operation parallelism optimization algorithm in SIMD processor synthesis. Given an initial assembly code and timing constraints, our alg...
Nozomu Togawa, Hideki Kawazu, Jumpei Uchida, Yuich...
ISCAS
2005
IEEE
148views Hardware» more  ISCAS 2005»
14 years 5 months ago
A novel 1.5V DC offset cancellation CMOS down conversion mixer
Anh-Tuan Phan, Chang-Wan Kim, Moon-Suk Jung, Yun-A...
ISCAS
2005
IEEE
175views Hardware» more  ISCAS 2005»
14 years 5 months ago
New curvature-compensation technique for CMOS bandgap reference with sub-1-V operation
—A new sub-1-V curvature-compensated CMOS bandgap reference, which utilizes the temperature-dependent currents generated from the parasitic n-p-n and p-n-p bipolar junction trans...
Ming-Dou Ker, Jung-Sheng Chen, Ching-Yun Chu
ISCAS
2005
IEEE
157views Hardware» more  ISCAS 2005»
14 years 5 months ago
Analog complex wavelet filters
Abstract— This paper presents an analog implementation of the complex wavelet transform using both the complex first order system (CFOS) and the Pad´e approximation. The comple...
Sandro A. P. Haddad, J. M. H. Karel, Ralf L. M. Pe...