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ISCAS
2008
IEEE
115views Hardware» more  ISCAS 2008»
14 years 6 months ago
FSMD partitioning for low power using simulated annealing
— It is well known that significant power savings can be obtained by disabling or shutting down parts of a circuit during idle periods. One method is to use a high level partiti...
Nainesh Agarwal, Nikitas J. Dimopoulos
ISCAS
2008
IEEE
127views Hardware» more  ISCAS 2008»
14 years 6 months ago
On the design of single-inductor multiple-output DC-DC buck converters
Massimiliano Belloni, Edoardo Bonizzoni, Franco Ma...
ISCAS
2008
IEEE
144views Hardware» more  ISCAS 2008»
14 years 6 months ago
A novel VLSI iterative divider architecture for fast quotient generation
—In this paper, a novel VLSI iterative divider architecture for fast quotient generation that is based on radix-2 non-restoring division is proposed. To speed up the quotient gen...
Tso-Bing Juang, Sheng-Hung Chen, Shin-Mao Li
ISCAS
2008
IEEE
85views Hardware» more  ISCAS 2008»
14 years 6 months ago
Frame-parallel design strategy for high definition B-frame H.264/AVC encoder
High Definition (HD) H.264/AVC video compression is the emerging necessity on nowadays home entertainment environment and so on. However, Although B-frame coding scheme provides ...
Yi-Hau Chen, Tzu-Der Chuang, Yu-Han Chen, Chen-Han...
ISCAS
2008
IEEE
130views Hardware» more  ISCAS 2008»
14 years 6 months ago
A 1.2mW CMOS temporal-difference image sensor for sensor networks
Zhengming Fu, Eugenio Culurciello
ISCAS
2008
IEEE
123views Hardware» more  ISCAS 2008»
14 years 6 months ago
An 8-bit 1.8 V 500 MS/s CMOS DAC with a novel four-stage current steering architecture
Santanu Sarkar 0002, Ravi Sankar Prasad, Sanjoy Ku...
ISCAS
2008
IEEE
85views Hardware» more  ISCAS 2008»
14 years 6 months ago
Investigation of state transition phenomena in cross-coupled chaotic circuits
— Studies on chaos synchronization in coupled chaotic circuits are extensively carried out in various fields. In this study, two simple chaotic circuits cross-coupled by inducto...
Yumiko Uchitani, Yoshifumi Nishio
ISCAS
2008
IEEE
103views Hardware» more  ISCAS 2008»
14 years 6 months ago
Prediction-based real-time CABAC decoder for high definition H.264/AVC
— This paper proposes a prediction scheme to decode in real-time H.264/AVC bitstream coded in Context-based Adaptive Binary Arithmetic Coding (CABAC). The proposed scheme predict...
WonHee Son, In-Cheol Park
ISCAS
2008
IEEE
109views Hardware» more  ISCAS 2008»
14 years 6 months ago
A low-area interconnect architecture for chip multiprocessors
— A new inter-processor communication architecture for chip multiprocessors is proposed which has a low area cost and flexible routing capability. To achieve a low area cost, th...
Zhiyi Yu, Bevan M. Baas