The use of dual threshold voltages can significantly reduce the static power dissipated in CMOS VLSI circuits. With the supply voltage at 1V and threshold voltage as low as 0.2V ...
—Energy-efficient design of battery-powered systems demands optimizations in both hardware and software. We present a modular approach for enhancing instruction level simulators ...
This paper describes a new mixed-swing topology for dual-rail domino logic that results in a simultaneous energy and delay reduction. HSPICE simulation results for a 1-bit full ad...
Bharath Ramasubramanian, Herman Schmit, L. Richard...
-- The goal of a dynamic power management policy is to reduce the power consumption of an electronic system by putting system components into different states, each representing ce...
As we approach Gigascale Integration, chip power consumption is becoming a critical system parameter. Clock-gating idle units provides needed reductions in power consumption. Howe...
Mondira Deb Pant, Pankaj Pant, D. Scott Wills, Viv...