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ISPD
2004
ACM
130views Hardware» more  ISPD 2004»
14 years 4 months ago
An ECO algorithm for eliminating crosstalk violations
Hua Xiang, Kai-Yuan Chao, D. F. Wong
ISPD
2004
ACM
87views Hardware» more  ISPD 2004»
14 years 4 months ago
Sensitivity guided net weighting for placement driven synthesis
Ting-Yuan Wang, Jeng-Liang Tsai, Charlie Chung-Pin...
ISPD
2004
ACM
134views Hardware» more  ISPD 2004»
14 years 4 months ago
Performance-driven register insertion in placement
As the CMOS technology is scaled into the dimension of nanometer, the clock frequencies and die sizes of ICs are shown to be increasing steadily [5]. Today, global wires that requ...
Dennis K. Y. Tong, Evangeline F. Y. Young
ISPD
2004
ACM
161views Hardware» more  ISPD 2004»
14 years 4 months ago
Early-stage power grid analysis for uncertain working modes
High performance integrated circuits are now reaching the 100-plus watt regime, and power delivery and power grid signal integrity have become critical. Analyzing the performance ...
Haifeng Qian, Sani R. Nassif, Sachin S. Sapatnekar
ISPD
2004
ACM
150views Hardware» more  ISPD 2004»
14 years 4 months ago
Topology optimization of structured power/ground networks
This paper presents an efficient method for optimizing the design of power/ground (P/G) networks by using locally regular, globally irregular grids. The procedure divides the pow...
Jaskirat Singh, Sachin S. Sapatnekar
ISPD
2004
ACM
92views Hardware» more  ISPD 2004»
14 years 4 months ago
A predictive distributed congestion metric and its application to technology mapping
Due to increasing design complexity, routing congestion has become a critical problem in VLSI designs. This paper introduces a distributed metric to predict routing congestion for...
Rupesh S. Shelar, Sachin S. Sapatnekar, Prashant S...
ISPD
2004
ACM
120views Hardware» more  ISPD 2004»
14 years 4 months ago
On optimal physical synthesis of sleep transistors
Considering the voltage drop constraint over a distributed model for power/ground (P/G) network, we study the following two problems for physical synthesis of sleep transistors: t...
Changbo Long, Jinjun Xiong, Lei He
ISPD
2004
ACM
126views Hardware» more  ISPD 2004»
14 years 4 months ago
Recursive bisection based mixed block placement
Many current designs contain a large number of standard cells intermixed with larger macro blocks. The range of size in these “mixed block” designs complicates the placement p...
Ateen Khatkhate, Chen Li 0004, Ameya R. Agnihotri,...
ISPD
2004
ACM
97views Hardware» more  ISPD 2004»
14 years 4 months ago
Implementation and extensibility of an analytic placer
Automated cell placement is a critical problem in VLSI physical design. New analytical placement methods that simultaneously spread cells and optimize wirelength have recently rec...
Andrew B. Kahng, Qinke Wang
ISPD
2004
ACM
171views Hardware» more  ISPD 2004»
14 years 4 months ago
Structured ASIC, evolution or revolution?
This paper describes the structured ASIC technology and impacts to the implementation flow. With an optimized and programmable structure, the structured ASIC technology indeed int...
Kun-Cheng Wu, Yu-Wen Tsai