The clock period in conventional pipeline scheme is proportional to the maximum delay while in hybrid wave-pipelining it is proportional to the maximum delay difference. An 8×8-b...
In this paper, we introduce a novel context sensitive system design paradigm. Multiple sensors/ computational architecture, in the form of our eWatch device, is used to infer the ...
Asim Smailagic, Daniel P. Siewiorek, Uwe Maurer, A...
In this paper, we propose Boost Logic, a logic family which relies on voltage scaling, gate overdrive and energy recovery techniques to achieve high energy efficiency at frequenc...
Visvesh S. Sathe, Marios C. Papaefthymiou, Conrad ...
A key challenge facing nanotechnologies will be controlling nanoarrays, two orthogonal sets of nanowires that form a crossbar, using a moderate number of mesoscale wires. Three me...
The popularity of Software Radios is increasing, as they have become one of the important emerging technologies in mobile communications. One of the major challenges during develo...
The authors present a turbo soft-in soft-out (SISO) decoder based on Max-Log maximum a posteriori (ML-MAP) algorithm implemented with sliding window (SW) method. A novel technique...
— Direct tunneling current is the major component of static power dissipation of a CMOS circuit for technology below 65nm, where the gate dielectric (SiO2) is very low. We intuit...
Saraju P. Mohanty, Ramakrishna Velagapudi, Valmiki...
Multimedia applications are often characterized by a large number of data accesses with regular and periodic access patterns. In these cases, optimized pipelined memory access con...
Bertrand Le Gal, Emmanuel Casseau, Sylvain Huet, E...