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HIPC
2009
Springer
13 years 5 months ago
Non-uniform power access in large caches with low-swing wires
Modern processors dedicate more than half their chip area to large L2 and L3 caches and these caches contribute significantly to the total processor power. A large cache is typica...
Aniruddha N. Udipi, Naveen Muralimanohar, Rajeev B...
MICRO
2007
IEEE
115views Hardware» more  MICRO 2007»
14 years 1 months ago
Optimizing NUCA Organizations and Wiring Alternatives for Large Caches with CACTI 6.0
A significant part of future microprocessor real estate will be dedicated to L2 or L3 caches. These on-chip caches will heavily impact processor performance, power dissipation, a...
Naveen Muralimanohar, Rajeev Balasubramonian, Norm...