EUROPAR
2010
Springer
14 years 1 months ago
2010
Springer
Abstract. Shared last level cache is crucial to performance. However, multithread program model incurs serious contention in shared cache. In this paper, to reduce average cache ac...
DSD
2009
IEEE
14 years 4 months ago
2009
IEEE
Modern systems are able to put two or more processors on the same die (Chip Multiprocessors, CMP), each with its private caches, while the last level caches can be either private ...
DATE
2005
IEEE
14 years 6 months ago
2005
IEEE
In this paper, we investigate the impact of Tox and Vth on power performance trade-offs for on-chip caches. We start by examining the optimization of the various components of a s...