MICRO
1999
IEEE
14 years 4 months ago
1999
IEEE
MICRO
1999
IEEE
14 years 4 months ago
1999
IEEE
3D graphics performance is increasing faster than any other computing application. Almost all PC systems now include 3D graphics accelerators for games, CAD, or visualization appl...
MICRO
1999
IEEE
14 years 4 months ago
1999
IEEE
Branch mispredictions are a major obstacle to exploiting instruction-level parallelism, at least in part because all instructions after a mispredicted branch are squashed. However...
MICRO
1999
IEEE
14 years 4 months ago
1999
IEEE
Instruction supply is a crucial component of processor performance. Instruction prefetching has been proposed as a mechanism to help reduce instruction cache misses, which in turn...
MICRO
1999
IEEE
14 years 4 months ago
1999
IEEE
Although PC-class 3D graphics hardware has made significant strides in the last several years, the underlying architectural design principles are still generally considered as a b...
MICRO
1999
IEEE
14 years 4 months ago
1999
IEEE
MICRO
1999
IEEE
14 years 4 months ago
1999
IEEE
The speculative multithreading paradigm (speculative threadlevel parallelism) is based on the concurrent execution of control-speculative threads. The efficiency of microarchitect...
MICRO
1999
IEEE
14 years 4 months ago
1999
IEEE
Current microprocessors incorporate techniques to exploit instruction-level parallelism (ILP). However, previous work has shown that these ILP techniques are less effective in rem...
MICRO
1999
IEEE
14 years 4 months ago
1999
IEEE
This study compares the speed, area, and power of di erent implementations of Active Pages OCS98], an intelligent memory system which helps bridge the growing gap between processo...
MICRO
1999
IEEE
14 years 4 months ago
1999
IEEE
Compressing the instructions of an embedded program is important for cost-sensitive low-power control-oriented embedded computing. A number of compression schemes have been propos...