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    DATE
    2006
    IEEE
    127views Hardware» more  DATE 2006»
    ASIP architecture for multi-standard wireless terminals
    14 years 5 months ago
    ASIP architecture for multi-standard wireless terminals
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    This paper presents the Block Processing Engine (BPE), an Application Specific Instruction-Set Processor (ASIP) explicitly designed for the implementation of multistandard wireles...
    Daniele Lo Iacono, J. Zory, Ettore Messina, N. Pia...
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