NOCS
2010
IEEE
13 years 10 months ago
2010
IEEE
The number of cores present on-chip is increasing rapidly. The on-chip network that connects these cores needs to scale efficiently. The topology of on-chip networks is an importan...
NOCS
2010
IEEE
13 years 10 months ago
2010
IEEE
Router microarchitecture plays a central role in the performance of an on-chip network (NoC). Buffers are needed in routers to house incoming flits which cannot be immediately forw...
NOCS
2010
IEEE
13 years 10 months ago
2010
IEEE
Abstract--Networks-on-Chip (NoC) have emerged as a replacement for traditional shared-bus designs for on-chip communications. As with all current VLSI designs, however, reducing po...
NOCS
2010
IEEE
13 years 10 months ago
2010
IEEE
Abstract--The high-performance computing domain is enriching with the inclusion of Networks-on-chip (NoCs) as a key component of many-core (CMPs or MPSoCs) architectures. NoCs face...
NOCS
2010
IEEE
13 years 10 months ago
2010
IEEE
NOCS
2010
IEEE
13 years 11 months ago
2010
IEEE
NOCS
2010
IEEE
13 years 11 months ago
2010
IEEE
—With the emergence of on-chip networks, the power consumed by router buffers has become a primary concern. Bufferless flow control addresses this issue by removing router buffe...
NOCS
2010
IEEE
13 years 11 months ago
2010
IEEE
—Three-dimensional network-on-chip (3D NoC), the combination of NoC and die-stacking 3D IC technology, is motivated to achieve lower latency, lower power consumption, and higher ...
NOCS
2010
IEEE
13 years 11 months ago
2010
IEEE
NOCS
2010
IEEE
13 years 11 months ago
2010
IEEE