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VLSID
2004
IEEE
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VLSI
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VLSID 2004
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Computing Silent Gate Models for Noise Analysis from Slew and Delay Tables
15 years 29 days ago
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research.synopsys.com
Abstract--In this paper, we present a new approach to calculate the steady state resistance values for CMOS library gates. These resistances are defined as simple equivalent models...
Shabbir H. Batterywala, Narendra V. Shenoy
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