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VTS
2003
IEEE
88views Hardware» more  VTS 2003»
14 years 5 months ago
Use of Multiple IDDQ Test Metrics for Outlier Identification
With increasing circuit complexity and reliability requirements, screening outlier chips is an increasingly important test challenge. This is especially true for IDDQ test due to ...
Sagar S. Sabade, D. M. H. Walker
DFT
2003
IEEE
86views VLSI» more  DFT 2003»
14 years 5 months ago
CROWNE: Current Ratio Outliers with Neighbor Estimator
Increased leakage and process variations make distinction between fault-free and faulty chips by IDDQ test difficult. Earlier the concept of Current Ratios (CR) was proposed to sc...
Sagar S. Sabade, D. M. H. Walker