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32
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DATE
1999
IEEE
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DATE 1999
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Testing the Configurable Interconnect/Logic Interface of SRAM-Based FPGA's
14 years 3 months ago
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www.cecs.uci.edu
The objective of this paper is to define a minimum number of configurations for testing the configurable modules that interface the global interconnect and the logic cells of SRAM...
Michel Renovell, Jean Michel Portal, Joan Figueras...
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