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    VLSID
    2004
    IEEE
    146views VLSI» more  VLSID 2004»
    CMOS Circuit Design for Minimum Dynamic Power and Highest Speed
    14 years 12 months ago
    CMOS Circuit Design for Minimum Dynamic Power and Highest Speed
    Download  www.eng.auburn.edu
    {A new low-power design method produces CMOS circuits that consume the least dynamic power at the highest speed permitted under the technology constraint. A gate is characterized b...
    Tezaswi Raja, Vishwani D. Agrawal, Michael L. Bush...
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