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DDECS
2007
IEEE
90
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DDECS 2007
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Test Pattern Generator for Delay Faults
14 years 3 months ago
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www.knws.uz.zgora.pl
A method of generating test pairs for the delay faults is presented in this paper. The modification of the MISR register gives the source of test pairs. The modification of this r...
Tomasz Rudnicki, Andrzej Hlawiczka
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