Sciweavers

DDECS
2007
IEEE
90views Hardware» more  DDECS 2007»
14 years 3 months ago
Test Pattern Generator for Delay Faults
A method of generating test pairs for the delay faults is presented in this paper. The modification of the MISR register gives the source of test pairs. The modification of this r...
Tomasz Rudnicki, Andrzej Hlawiczka