DATE
2004
IEEE
14 years 3 months ago
2004
IEEE
In this paper, we propose an approach to estimate the Worst Case Response Time (WCRT) of tasks in a preemptive multi-tasking single-processor real-time system with a set associati...
HPCA
1996
IEEE
14 years 3 months ago
1996
IEEE
In this paper, we propose a cache design that provides the same miss rate as a two-way set associative cache, but with a access time closer to a direct-mapped cache. As with other...
MICRO
1999
IEEE
14 years 3 months ago
1999
IEEE
Increasing levels of microprocessor power dissipation call for new approaches at the architectural level that save energy by better matching of on-chip resources to application re...
ICCD
2004
IEEE
14 years 8 months ago
2004
IEEE
This paper proposes a power-aware cache block allocation algorithm for the way-selective setassociative cache on embedded systems to reduce energy consumption without additional d...