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SIGARCH
2008
93views more  SIGARCH 2008»
13 years 11 months ago
NOBLE: non-blocking programming support via lock-free shared abstract data types
e Shared Abstract Data Types H
Håkan Sundell, Philippas Tsigas
SIGARCH
2008
94views more  SIGARCH 2008»
13 years 11 months ago
Optimized on-chip pipelining of memory-intensive computations on the cell BE
Multiprocessors-on-chip, such as the Cell BE processor, regularly suffer from restricted bandwidth to off-chip main memory. We propose to reduce memory bandwidth requirements, and...
Christoph W. Kessler, Jörg Keller
SIGARCH
2008
96views more  SIGARCH 2008»
13 years 11 months ago
Towards hybrid last level caches for chip-multiprocessors
As CMP platforms are widely adopted, more and more cores are integrated on to the die. To reduce the off-chip memory access, the last level cache is usually organized as a distribu...
Li Zhao, Ravi Iyer, Mike Upton, Don Newell
SIGARCH
2008
144views more  SIGARCH 2008»
13 years 11 months ago
A stream chip-multiprocessor for bioinformatics
- Bioinformatics applications such as gene and protein sequence matching algorithms are characterized by the need to process large amounts of data. While uni-processor performance ...
Ravi Kiran Karanam, Arun Ravindran, Arindam Mukher...
SIGARCH
2008
152views more  SIGARCH 2008»
13 years 11 months ago
OpenDF: a dataflow toolset for reconfigurable hardware and multicore systems
This paper presents the OpenDF framework and recalls that dataflow programming was once invented to address the problem of parallel computing. We discuss the problems with an impe...
Shuvra S. Bhattacharyya, Gordon J. Brebner, Jö...
SIGARCH
2008
107views more  SIGARCH 2008»
13 years 11 months ago
A lightweight streaming layer for multicore execution
As multicore architectures gain widespread use, it becomes increasingly important to be able to harness their additional processing power to achieve higher performance. However, e...
David Zhang, Qiuyuan J. Li, Rodric Rabbah, Saman A...
SIGARCH
2008
107views more  SIGARCH 2008»
13 years 11 months ago
Multitasking workload scheduling on flexible core chip multiprocessors
While technology trends have ushered in the age of chip multiprocessors (CMP) and enabled designers to place an increasing number of cores on chip, a fundamental question is what ...
Divya Gulati, Changkyu Kim, Simha Sethumadhavan, S...
SIGARCH
2008
77views more  SIGARCH 2008»
13 years 11 months ago
A domain-specific approach for software development on Manycore platforms
Jerker Bengtsson, Bertil Svensson
SIGARCH
2008
73views more  SIGARCH 2008»
13 years 11 months ago
Servo: a programming model for many-core computing
Conventional programming models were designed to be used by expert programmers for programming for largescale multiprocessors, distributed computational clusters, or specialized p...
Nicolas Zea, John Sartori, Rakesh Kumar
SIGARCH
2008
97views more  SIGARCH 2008»
13 years 11 months ago
SP-NUCA: a cost effective dynamic non-uniform cache architecture
1 This paper presents a simple but effective method to reduce on-chip access latency and improve core isolation in CMP Non-Uniform Cache Architectures (NUCA). The paper introduces ...
Javier Merino, Valentin Puente, Pablo Prieto, Jos&...