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ASPDAC
1999
ACM
112views Hardware» more  ASPDAC 1999»
13 years 12 months ago
Relaxed Simulated Tempering for VLSI Floorplan Designs
In the past two decades, the simulated annealing technique has been considered as a powerful approach to handle many NP-hard optimization problems in VLSI designs. Recently, a new...
Jason Cong, Tianming Kong, Dongmin Xu, Faming Lian...
DCC
2007
IEEE
14 years 7 months ago
Joint Optimization of Distributed Broadcast Quantization Systems for Classification
We develop a simulated annealing technique to jointly optimize a distributed quantization structure meant to maximize the asymptotic error exponent of a downstream classifier or d...
Michael A. Lexa, Don H. Johnson