Sciweavers

ASPDAC
2004
ACM
94views Hardware» more  ASPDAC 2004»
14 years 3 months ago
Improving simulation-based verification by means of formal methods
The design of complex systems is largely ruled by the time needed for verification. Even though formal methods can provide higher reliability, in practice often simulation based ve...
Görschwin Fey, Rolf Drechsler
DAC
2003
ACM
15 years 15 days ago
Coverage directed test generation for functional verification using bayesian networks
Functional verification is widely acknowledged as the bottleneck in the hardware design cycle. This paper addresses one of the main challenges of simulation based verification (or...
Shai Fine, Avi Ziv