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    ASPDAC
    1999
    ACM
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    A Method for Evaluating Upper Bound of Simultaneous Switching Gates Using Circuit Partition
    14 years 10 months ago
    A Method for Evaluating Upper Bound of Simultaneous Switching Gates Using Circuit Partition
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    : This paper presents a method for evaluating an upper bound of simultaneous switching gates in combinational circuits. In this method, the original circuit is partitioned into sub...
    Kai Zhang, Tsuyoshi Shinogi, Haruhiko Takase, Teru...
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