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    DAC
    2003
    ACM
    137views Computer Architecture» more  DAC 2003»
    Test cost reduction for SOCs using virtual TAMs and lagrange multipliers
    14 years 8 months ago
    Test cost reduction for SOCs using virtual TAMs and lagrange multipliers
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    Recent advances in tester technology have led to automatic test equipment (ATE) that can operate at up to several hundred MHz. However, system-on-chip (SOC) scan chains typically ...
    Anuja Sehgal, Vikram Iyengar, Mark D. Krasniewski,...
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