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    ICCAD
    2009
    IEEE
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    A parallel preconditioning strategy for efficient transistor-level circuit simulation
    13 years 10 months ago
    A parallel preconditioning strategy for efficient transistor-level circuit simulation
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    A parallel computing approach for large-scale SPICE-accurate circuit simulation is described that is based on a new preconditioned iterative solver. The preconditioner involves the...
    Heidi Thornquist, Eric R. Keiter, Robert J. Hoekst...
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