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    CSREAESA
    2004
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    Automatic Extraction of Non-Iterated System Behavior from Verilog Specifications
    14 years 18 days ago
    Automatic Extraction of Non-Iterated System Behavior from Verilog Specifications
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    In this paper we present an algorithm for automatic extraction of system behavior from a structural Verilog specification. The algorithm generates a series-parallel poset expressi...
    Lubomir Ivanov
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