Sciweavers

CC
2004
Springer
134views System Software» more  CC 2004»
13 years 11 months ago
Widening Integer Arithmetic
Abstract. Some codes require computations to use fewer bits of precision than are normal for the target machine. For example, Java requires 32-bit arithmetic even on a 64-bit targe...
Kevin Redwine, Norman Ramsey
CC
2004
Springer
114views System Software» more  CC 2004»
13 years 11 months ago
Integrating the Soot Compiler Infrastructure into an IDE
This paper presents the integration of Soot, a byte-code analysis and transformation framework, with an integrated development environment (IDE), Eclipse. Such an integrated toolki...
Jennifer Lhoták, Ondrej Lhoták, Laur...
CASES
2004
ACM
13 years 11 months ago
Translating affine nested-loop programs to process networks
New heterogeneous multiprocessor platforms are emerging that are typically composed of loosely coupled components that exchange data using programmable interconnections. The compon...
Alexandru Turjan, Bart Kienhuis, Ed F. Deprettere
CASES
2004
ACM
13 years 11 months ago
Reducing energy consumption of queries in memory-resident database systems
The tremendous growth of system memories has increased the capacities and capabilities of memory-resident embedded databases, yet current embedded databases need to be tuned in or...
Jayaprakash Pisharath, Alok N. Choudhary, Mahmut T...
CASES
2004
ACM
13 years 11 months ago
Automatic data partitioning for the agere payload plus network processor
With the ever-increasing pervasiveness of the Internet and its stringent performance requirements, network system designers have begun utilizing specialized chips to increase the ...
Steve Carr, Philip H. Sweany
CASES
2004
ACM
13 years 11 months ago
Providing time- and space- efficient procedure calls for asynchronous software thread integration
Asynchronous Software Thread Integration (ASTI) provides fine-grain concurrency in real-time threads by statically scheduling (integrating) code from primary threads into secondar...
Vasanth Asokan, Alexander G. Dean
CASES
2004
ACM
13 years 11 months ago
Scalable custom instructions identification for instruction-set extensible processors
Extensible processors allow addition of application-specific custom instructions to the core instruction set architecture. However, it is computationally expensive to automaticall...
Pan Yu, Tulika Mitra
HIPEAC
2009
Springer
13 years 11 months ago
Deriving Efficient Data Movement from Decoupled Access/Execute Specifications
Abstract. On multi-core architectures with software-managed memories, effectively orchestrating data movement is essential to performance, but is tedious and error-prone. In this p...
Lee W. Howes, Anton Lokhmotov, Alastair F. Donalds...
HIPEAC
2009
Springer
13 years 11 months ago
HeDGE: Hybrid Dataflow Graph Execution in the Issue Logic
Abstract. Exposing more instruction-level parallelism in out-of-order superscalar processors requires increasing the number of dynamic in-flight instructions. However, large instru...
Suriya Subramanian, Kathryn S. McKinley