TCAD
2002
13 years 10 months ago
2002
TCAD
2002
13 years 10 months ago
2002
Test scheduling is an important problem in system-on-a-chip (SOC) test automation. Efficient test schedules minimize the overall system test application time, avoid test resource c...
TCAD
2002
13 years 10 months ago
2002
The design of programmable logic architectures and supporting computer-aided design tools fundamentally requires both a good understanding of the combinatorial nature of netlist gr...
TCAD
2002
13 years 10 months ago
2002
This paper proposes split shared-bus architecture to reduce the energy dissipation for global data exchange among a set of interconnected modules. The bus splitting problem for mi...
TCAD
2002
13 years 10 months ago
2002
As IC densities are increasing, cluster-based FPGA architectures are becoming the architecture of choice for major FPGA manufacturers. A cluster-based architecture is one in which...
TCAD
2002
13 years 10 months ago
2002
System-on-a-chip (SOC) platform manufacturers are increasingly adding configurable features that provide power and performance flexibility in order to increase a platform's ap...
TCAD
2002
13 years 10 months ago
2002
As very large scale integration (VLSI) circuit speed rapidly increases, the inductive effects of interconnect lines strongly impact the signal integrity of a circuit. Since these i...
TCAD
2002
13 years 10 months ago
2002
Embedded hard real-time software systems often need fine-grained parallelism and precise control of timing, things typical real-time operating systems do not provide. The Esterel l...
TCAD
2002
13 years 10 months ago
2002
In this paper, we propose a new approach for VLSI interconnect global routing that can optimize both congestion and delay, which are often competing objectives. Our approach provi...
TCAD
2002
13 years 10 months ago
2002
Abstract--In this paper, we study wire width planning for interconnect performance optimization in an interconnect-centric design flow. We first propose some simplified, yet near-o...