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31
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DATE
1998
IEEE
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DATE 1998
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Fast Sequential Circuit Test Generation Using High-Level and Gate-Level Techniques
14 years 4 months ago
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www.cad.polito.it
A new approach for sequential circuit test generation is proposed that combines software testing based techniques at the high level with test enhancement techniques at the gate le...
Elizabeth M. Rudnick, Roberto Vietti, Akilah Ellis...
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