EMNETS
2007
13 years 10 months ago
2007
Designing Wireless Sensor Networks (WSNs) has proven to be a slow, tedious and error-prone process due to the inherent intricacies of designing a distributed, wireless, and embedd...
DAC
1999
ACM
13 years 11 months ago
1999
ACM
The purpose of this paper is to develop a exible design for test methodology for testing a core-based system on chip SOC . The novel feature of the approach is the use an embedde...
VTS
2002
IEEE
13 years 11 months ago
2002
IEEE
We present a test methodology to allow testing high-speed circuits with low-speed ATEs. The basic strategy is adding an interface circuit to partially supply test data, coordinate...
ITC
2003
IEEE
14 years 4 days ago
2003
IEEE
Composite microsystems that integrate mechanical and fluidic components are fast emerging as the next generation of system-on-chip designs. As these systems become widespread in s...
ITC
2003
IEEE
14 years 4 days ago
2003
IEEE
ct This paper describes a general technique to test external memory/caches and memory interconnects using on-chip logic. Such a test methodology is expected to significantly reduc...