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    TCAD
    1998
    82views more  TCAD 1998»
    LOT: Logic Optimization with Testability. New transformations for logic synthesis
    13 years 6 months ago
    LOT: Logic Optimization with Testability. New transformations for logic synthesis
    Download  www-eda.eit.uni-kl.de
    —A new approach to optimize multilevel logic circuits is introduced. Given a multilevel circuit, the synthesis method optimizes its area while simultaneously enhancing its random...
    Mitrajit Chatterjee, Dhiraj K. Pradhan, Wolfgang K...
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    ICCAD
    1995
    IEEE
    88views Hardware» more  ICCAD 1995»
    LOT: logic optimization with testability-new transformations using recursive learning
    13 years 10 months ago
    LOT: logic optimization with testability-new transformations using recursive learning
    Download  www.cecs.uci.edu
    : A new approach to optimize multi-level logic circuits is introduced. Given a multi-level circuit, the synthesis method optimizes its area, simultaneously enhancing its random pat...
    Mitrajit Chatterjee, Dhiraj K. Pradhan, Wolfgang K...
    claim paper
    Read More »
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