The estimation of average-power dissipation of a circuit through exhaustive simulation is impractical due to the large number of primary inputs and their combinations. In this brie...
Ashok K. Murugavel, N. Ranganathan, Ramamurti Chan...
Abstract--This paper provides a high level survey of the increasing effects of on-chip inductance. These effects are classified into desirable and nondesirable effects. Among the u...
We propose a technique for reducing the energy spent in the memory-processor interface of an embedded system during the execution of firmware code. The method is based on the idea ...
Luca Benini, Alberto Macii, Enrico Macii, Massimo ...
We propose two practical approaches for on-chip inductance extraction to obtain a highly sparsified and accurate inverse inductance matrix K. Both approaches differ from previous ...
Abstract--We introduce the notion of energy-scalable systemdesign. The principal idea is to maximize computational quality for a given energy constraint at all levels of the system...
Circular built-in self-test (BIST) is a "test per clock" scheme that offers many advantages compared with conventional BIST approaches in terms of low area overhead, simp...
Abstract--In this paper, we propose two-dimensional (2-D) systolic-array infinite-impulse response (IIR) and finite-impulse response (FIR) digital filter architectures without glob...
Theoretical analysis of bus-invert coding for reducing switching activity was previously investigated. In this paper we conduct a theoretical analysis of this method for coupling r...