An accurate and efficient stacking effect macro-model for leakage power in sub-100nm circuits is presented in this paper. Leakage power, including subthreshold leakage power and ga...
Shengqi Yang, Wayne Wolf, Narayanan Vijaykrishnan,...
This paper employs general multivariate normal distribution to develop a new efficient statistical timing analysis methodology. The paper presents the theoretical framework of the...
This paper presents two schemes for the implementation of high performance and low power FIR filtering Intellectual Property (IP) cores. Low power is achieved through the utilizat...
Buffer insertion method plays a great role in modern VLSI design. Many buffer insertion algorithms have been proposed in recent years. However, most of them used simplified delay ...
Low-Density Parity Check codes are a form of Error Correcting Codes used in various wireless communication applications and in disk drives. While LDPC codes are desirable due to t...
Theo Theocharides, Greg M. Link, Narayanan Vijaykr...
One of the main challenges for design in the presence of process variations is to cope with the uncertainties in delay and leakage power. In this paper, the influence of leakage r...
Timing margin (slack) needs to be carefully managed to ensure a satisfactory timing yield. We propose a new design flow that combines a false-path-aware gate sizing and a statisti...
Jeng-Liang Tsai, Dong Hyun Baik, Charlie Chung-Pin...
In this paper, we have studied and compared the RF performance metrics, unity gain frequency (ft) and Noise Figure (NF), of the devices with channel engineering consisting of halo...
In this paper, we present a simple analytical equation for capturing phase errors in 3-stage ring oscillators. The model, based on a simple but useful idealization of the ring osc...
This paper explores the recovery and rate capacity effect for batteries used in embedded systems. It describes the prominent battery models with their advantages and drawbacks. It...
Venkat Rao, Gaurav Singhal, Anshul Kumar, Nicolas ...