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    VLSID
    2005
    IEEE
    139views VLSI» more  VLSID 2005»
    Variable Input Delay CMOS Logic for Low Power Design
    14 years 11 months ago
    Variable Input Delay CMOS Logic for Low Power Design
    Download  www.eng.auburn.edu
    Modern digital circuits consist of logic gates implemented in the complementary metal oxide semiconductor (CMOS) technology. The time taken for a logic gate output to change after...
    Tezaswi Raja, Vishwani D. Agrawal, Michael L. Bush...
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    VLSID
    2005
    IEEE
    102views VLSI» more  VLSID 2005»
    Rapid Embedded Hardware/Software System Generation
    14 years 11 months ago
    Rapid Embedded Hardware/Software System Generation
    Download  www.cse.unsw.edu.au
    This paper presents an RTL generation scheme for a SimpleScalar / PISA Instruction set architecture with system calls to implement C programs. The scheme utilizes ASIPmeister, a p...
    Jorgen Peddersen, Seng Lin Shee, Andhi Janapsatya,...
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    VLSID
    2005
    IEEE
    108views VLSI» more  VLSID 2005»
    Design of a Low Power Image Watermarking Encoder Using Dual Voltage and Frequency
    14 years 11 months ago
    Design of a Low Power Image Watermarking Encoder Using Dual Voltage and Frequency
    Download  www.cse.unt.edu
    Saraju P. Mohanty, N. Ranganathan, K. Balakrishnan
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    VLSID
    2005
    IEEE
    153views VLSI» more  VLSID 2005»
    Electromigration-Aware Physical Design of Integrated Circuits
    14 years 11 months ago
    Electromigration-Aware Physical Design of Integrated Circuits
    Download  www.tu-dresden.de
    The electromigration effect within current-density-stressed signal and power lines is an ubiquitous and increasingly important reliability and design problem in sub-micron IC desi...
    Göran Jerke, Jens Lienig
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    VLSID
    2005
    IEEE
    131views VLSI» more  VLSID 2005»
    Efficient Space/Time Compression to Reduce Test Data Volume and Testing Time for IP Cores
    14 years 11 months ago
    Efficient Space/Time Compression to Reduce Test Data Volume and Testing Time for IP Cores
    Download  people.ee.duke.edu
    Abstract-- We present two-dimensional (space/time) compression techniques that reduce test data volume and test application time for scan testing of intellectual property (IP) core...
    Lei Li, Krishnendu Chakrabarty, Seiji Kajihara, Sh...
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    VLSID
    2005
    IEEE
    117views VLSI» more  VLSID 2005»
    On-Chip Voltage Regulator with Improved Transient Response
    14 years 11 months ago
    On-Chip Voltage Regulator with Improved Transient Response
    Download  ic.ncue.edu.tw
    A new technique has been proposed to improve the transient behavior of the on-chip/embedded voltage regulator. It is realized by introducing a dynamic leakage path at the driver s...
    Ashis Maity, R. G. Raghavendra, Pradip Mandal
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    VLSID
    2005
    IEEE
    102views VLSI» more  VLSID 2005»
    Integrated On-Chip Storage Evaluation in ASIP Synthesis
    14 years 11 months ago
    Integrated On-Chip Storage Evaluation in ASIP Synthesis
    Download  www.cse.iitd.ernet.in
    An Application Specific Instruction Set Processor (ASIP) exploits special characteristics of the given application(s) to meet the desired performance, cost and power requirements....
    Manoj Kumar Jain, M. Balakrishnan, Anshul Kumar
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    VLSID
    2005
    IEEE
    140views VLSI» more  VLSID 2005»
    A Novel Bus Encoding Scheme from Energy and Crosstalk Efficiency Perspective for AMBA Based Generic SoC Systems
    14 years 11 months ago
    A Novel Bus Encoding Scheme from Energy and Crosstalk Efficiency Perspective for AMBA Based Generic SoC Systems
    Download  www.see.ed.ac.uk
    Inter-wire coupling is a major source of power consumption and delay faults for on-chip buses implemented in UDSM SoC Systems. Elimination or minimization of such faults is crucia...
    Zahid Khan, Tughrul Arslan, Ahmet T. Erdogan
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    VLSID
    2005
    IEEE
    86views VLSI» more  VLSID 2005»
    A Nanosensor Array-Based VLSI Gas Discriminator
    14 years 11 months ago
    A Nanosensor Array-Based VLSI Gas Discriminator
    Download  www.cse.psu.edu
    : Chemiresistive nanowires can be organized as cross-reactive sensor arrays to mimic the human olfactory system in terms of sensing and discriminating various gases and odors. This...
    Kevin M. Irick, Wei Xu, Narayanan Vijaykrishnan, M...
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    VLSID
    2005
    IEEE
    128views VLSI» more  VLSID 2005»
    On-Line Synthesis for Partially Reconfigurable FPGAs
    14 years 11 months ago
    On-Line Synthesis for Partially Reconfigurable FPGAs
    Download  www.sigda.org
    An important application of dynamically and partially reconfigurable computing platforms is in dynamic task allocation and execution. On-line synthesis, on-line placement and on-l...
    Renqiu Huang, Ranga Vemuri
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