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    VTS
    2005
    IEEE
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    Closed-Form Simulation and Robustness Models for SEU-Tolerant Design
    14 years 6 months ago
    Closed-Form Simulation and Robustness Models for SEU-Tolerant Design
    Download  www.ece.rice.edu
    — A closed-form model for simulation and analysis of voltage transients caused by single-event upsets (SEUs) in logic circuits is described. A linear RC model, derived using a SP...
    Kartik Mohanram
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