VTS
2003
IEEE
14 years 5 months ago
2003
IEEE
VTS
2003
IEEE
14 years 5 months ago
2003
IEEE
VTS
2003
IEEE
14 years 5 months ago
2003
IEEE
As the technology is shrinking toward 50 nm and the working frequency is going into multi gigahertz range, the effect of interconnects on functionality and performance of system-o...
VTS
2003
IEEE
14 years 5 months ago
2003
IEEE
: This paper presents a novel, low cost technique based on implications to identify untestable bridging faults in sequential circuits. Sequential symbolic simulation [1] is first p...
VTS
2003
IEEE
14 years 5 months ago
2003
IEEE
We present a novel analog checker that adjusts dynamically the error threshold to the magnitude of its input signals. We demonstrate that this property is crucial for accurate con...
VTS
2003
IEEE
14 years 5 months ago
2003
IEEE
In this paper, an efficient technique for test data volume reduction based on the shared scan-in (Illinois Scan) architecture and the scan chain reconfiguration (Dynamic Scan) arc...
VTS
2003
IEEE
14 years 5 months ago
2003
IEEE
With increasing circuit complexity and reliability requirements, screening outlier chips is an increasingly important test challenge. This is especially true for IDDQ test due to ...
VTS
2003
IEEE
14 years 5 months ago
2003
IEEE
This paper addresses the problem of compacting test responses in the presence of unknowns at the input of the compactor by exploiting the capabilities of well-known error detectio...
VTS
2003
IEEE
14 years 5 months ago
2003
IEEE
Irreversible computation necessarily results in energy dissipation due to information loss. While small in comparison to the power consumption of today’s VLSI circuits, if curre...
VTS
2003
IEEE
14 years 5 months ago
2003
IEEE
Delay faults are an increasingly important test challenge. Traditional open and bridge fault models are incomplete because only the functional fault or a subset of delay fault are...